This AI Transistor Can Change Its Own Response Speed

Researchers at KAIST have developed a new programmable semiconductor device that can change how quickly it responds to incoming data. The device is called a Programmable Dynamic Memtransistor, or PDM. Unlike conventional devices with largely fixed temporal behavior, the PDM can be programmed to respond differently to fast-changing and slow-changing signals — and retain those settings without continuous biasing. This is especially important for real-world AI. A robot, autonomous vehicle or wearable device may need to process events that happen on very different time scales. A sudden movement can occur almost instantly, while temperature, position or human behavior may change much more slowly. Normally, software has to compensate for those differences. The PDM moves part of that adaptation directly into hardware. Its gate stack contains two functional layers: a charge storage layer responsible for volatile temporal processing and a charge trap layer that non-volatilely changes the internal band structure of the device. By changing the electron density inside the charge trap layer, researchers were able to tune the relaxation time constant by approximately five times. That means the same basic transistor architecture can be configured to react quickly or slowly depending on the type of signal it is expected to process. The researchers then combined PDMs with different temporal settings into a wide reservoir computing architecture. Instead of forcing one hardware element to understand every time scale, multiple programmed devices process different temporal features in parallel. In a multiple superimposed oscillator prediction task, this architecture reduced normalized prediction error by about 40 times compared with a single-reservoir implementation. It also achieved accuracy comparable to a software-based approach when predicting a chaotic Lorenz attractor. The device also demonstrated a switching speed of approximately 50 nanoseconds. For volatile conductance modulation, the researchers calculated gate-side energy consumption of only 0.21 attojoules for 100 pulses. However, that number applies specifically to one part of the device operation — it is not the total energy consumption of an entire AI processor. Programming the non-volatile charge-trap state required around 16.2 picojoules, while the estimated read energy was approximately 125 picojoules per operation in the reported setup. Another important point is manufacturing compatibility. The researchers fabricated the PDM using a CMOS-compatible process and demonstrated a 16 × 16 transistor array, suggesting the concept could potentially scale toward larger neuromorphic systems. The work was led by researchers at KAIST, with participation from Samsung Electronics’ Semiconductor R&D Center, and was published in Nature Communications in July 2026. For future edge AI systems, this approach could reduce the amount of software processing needed to handle real-world signals that change at different speeds. Instead of making every signal fit the same hardware, the hardware itself can be tuned to the signal. Could programmable temporal behavior become a new building block for robots, autonomous vehicles and wearable AI? Subscribe to Xenon Lab News for more AI hardware, semiconductor and future technology breakthroughs. #KAIST #Memtransistor #PDM #AIChip #NeuromorphicComputing #EdgeAI #ArtificialIntelligence #ReservoirComputing #Semiconductors #AIHardware #SamsungElectronics #Robotics #AutonomousVehicles #WearableTech #FutureChips #ScienceNews #TechNews #XenonLabNews