Samsung Wants to Stack HBM Directly on Top of AI Chips

Samsung has revealed a radically different approach to high-bandwidth memory for future AI accelerators. At Future of Memory and Storage 2026 in Santa Clara, Samsung showcased the first concept model of zHBM — a 3D memory architecture that places high-bandwidth memory directly above the AI accelerator instead of positioning HBM stacks beside it. The idea is simple: dramatically reduce the physical distance between compute and memory. Samsung says a next-generation interface using zHBM could deliver approximately 8x the performance of HBM5, more than 10x the memory density, up to 3x higher energy efficiency and more than a 50% reduction in thermal resistance. These are Samsung’s projected figures for the architecture, not independent benchmark results from a commercial product. To make this possible, Samsung plans to use technologies including Hybrid Copper Bonding and Multi-Wafer Bonding, creating extremely dense vertical connections between the memory stack and the processor below it. zHBM could also include a customizable interlayer between the memory and AI accelerator, allowing additional customer-specific IP to be integrated into the package. The concept attacks one of the biggest problems facing modern AI processors: moving enormous amounts of data between compute units and memory. Today’s HBM systems already place memory close to GPUs and AI accelerators using advanced 2.5D packaging. But as AI models become larger, bandwidth, power consumption and data movement are increasingly becoming limiting factors. Research into 3D-stacked HBM and compute accelerators supports the basic idea. Studies have found that stacking memory directly with compute can dramatically increase available bandwidth and improve energy efficiency, although cooling and power delivery become major engineering challenges. And heat may be the biggest challenge of all. Placing a high-power AI accelerator underneath multiple memory layers creates an extremely difficult thermal environment. Hybrid copper bonding can improve vertical heat transfer, but researchers still identify thermomechanical stress, warpage and reliability as major problems for future high-layer-count HBM systems. Samsung has not announced a commercial launch date for zHBM. For now, it remains a technology concept and roadmap beyond conventional HBM architectures. But if the company can turn these projections into mass-produced hardware, the future AI accelerator may no longer have its memory sitting beside the processor. It could be stacked directly on top of it. Subscribe to Xenon Lab News for more AI hardware, semiconductor and future computing breakthroughs. #Samsung #zHBM #HBM #HBM5 #AIMemory #AIChips #ArtificialIntelligence #AIHardware #3DMemory #HybridBonding #HighBandwidthMemory #GPU #DataCenter #Semiconductors #FutureComputing #TechNews #XenonLabNews